FM17660 FMSH ISO 14443 A/B Contactless Reader IC QFN32
- Product Details
- Download
- ISO 14443 A/B compliant
- SPI, UART, I2C host interface
- M1 security engine
- QFN32 package
The FMSH FM17660 is a security ic supporting ISO 14443 A/B with a SPI, UART, I2C host interface, supplied in QFN32.
Key Specifications
| Supported Standard | ISO 14443 A/B |
| Host Interface | SPI, UART, I2C |
| Security Algorithm | M1 |
| Package | QFN32 |
| Typical Application | Contactless reader,POS,Smart lock |
Features
- Supports ISO/IEC 14443A/M1 reader/writer mode
- Supports ISO/IEC 14443B reader/writer mode
- ISO/IEC14443A 106kbit/s and higher transfer speed at 212kbit/s and 424kbit/s
- Typical operating distance in reader/writer mode for communication to a ISO/IEC
- 14443A card up to 50mm (depending on the antenna size and tuning)
- Supports host interfaces
- SPI interface up to 10Mbit/s
- I2C interface up to 400kbit/s in Fast Mode , and up to 3400kbit/s in High Speed Mode
Applications
Contactless reader, POS, Smart lock.
Design Notes
- Contactless parts need a tuned antenna. Read range and current draw both depend on the coil geometry and the Q of the matching network, so treat the datasheet distance figure as a reference design value, not a guarantee.
- Where the part supports both contact and contactless operation, the two interfaces share the same die and power domain. Plan the supply so a contact transaction does not brown out the RF field.
- Check the card-side standard before selecting: ISO 14443 A and B differ at the air interface, and a reader built for one will not talk to cards of the other.
- EEPROM endurance and retention are specified per the datasheet. If the application rewrites counters frequently, budget the write cycles against card lifetime.
Common Questions
What standard does this chip support?
ISO 14443 A/B. Matching the card-side standard is the first selection step — a reader built for one variant will not interoperate with cards of the other.
How is it connected to a host controller?
Through the host interface listed in the specifications above. The bus runs at pad voltage, so level shifting is not needed when the MCU shares the same rail.
Does it include the security algorithm in hardware?
Yes — the algorithm engine is on-die, which is why the key never leaves the chip.
What package is it available in?
QFN32. The datasheet mechanical drawing gives the land pattern and the clearance needed around the antenna pins.
Shenzhen Gaorunxin Technology Co., Ltd
Online message
Shenzhen Gaorunxin Technology Co., Ltd
