FMQL30TAI FMSH FPAI 8 TOPS AI SoC FCBGA676
FMQL30TAI FMSH FPAI 8 TOPS AI SoC FCBGA676

FMQL30TAI FMSH FPAI 8 TOPS AI SoC FCBGA676

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FMQL30TAI FMSH FPAI 8 TOPS AI SoC FCBGA676 — Logic Cells 125K, BRAM Capacity 9.3 Mb
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    At a Glance
    • 125K logic cells
    • 9.3 Mb BRAM
    • FCBGA676 (27×27 mm) package
    • Quad-core processor @ 1 GHz

    The FMSH FMQL30TAI is an FPAI heterogeneous AI SoC delivering 8 TOPS of INT8 compute on 1 × ZG330 iCore @ 1 GHz, with 125K logic cells of FPGA fabric in an FCBGA676 package measuring 27×27 mm. A CPU, an NPU and reconfigurable logic share one die, programmed through the ICraft toolchain.

    Key Specifications

    Programmable Logic

    Logic Cells125K
    LUT Count78,600
    BRAM Capacity9.3 Mb
    PCIeGen2 x4
    High-Speed Transceivers4 × transceivers, up to 12.5 Gbps
    XADC1

    Processing System

    ProcessorQuad-core processor @ 1 GHz
    L1 Cache32KB I + 32KB D
    L2 Cache256KB
    On-Chip Memory256KB
    DMA Channels8 channels
    External DDRDDR3 / DDR3L / LPDDR2 (ECC)
    External Storage2×Quad-SPI, NAND, NOR
    General PeripheralsCAN, SPI, UART, I2C, GPIO (up to 174 pins)
    High-Speed Peripherals2×USB, 2×GigE
    Security FeaturesDedicated security engine: RSA / AES / SHA-256 / SM4 with secure boot

    AI Engine

    AI Architecture1 × ZG330 iCore @ 1 GHz
    Compute8 TOPS @ INT8
    FP32 Compute4 TFLOPS @ FP16
    Numeric PrecisionINT8 / FP16 / BF16 / TF32
    Model SupportCNN, Transformer and similar networks
    PowerDynamic power management

    Package and I/O

    PackageFCBGA676
    Package Size27 × 27 mm
    Ball Pitch1.0 mm
    HPIO / HDIO Channels150/100

    Family Overview

    FPAI is a heterogeneous reconfigurable chip that puts FPGA fabric, an AI accelerator and a CPU on a single die. The line spans 4 to 128 TOPS and is programmed through the ICraft toolchain, which covers model compilation down to the fabric.

    • CPU + NPU + FPGA on one die
    • 4 to 128 TOPS
    • ICraft toolchain
    • Distributed LLM inference

    Applications

    Edge inference, video analytics, industrial inspection and distributed LLM serving where a CPU, an NPU and reconfigurable logic must share one die.

    Design Notes

    • TOPS figures are peak INT8 unless stated otherwise. Real throughput depends on the model's operator mix — convolution-heavy networks reach the peak far more readily than attention-heavy ones.
    • Model compilation goes through ICraft. Operator coverage is the practical limit, so check that your network's layers are supported before sizing the part.
    • Host and device memory are separate. For large models, plan the weight partitioning and the PCIe or Ethernet link budget between cards.
    • Power scales with the number of active cores. The headline figure assumes a workload profile; measure against your own model rather than the datasheet ceiling.

    Common Questions

    How much logic does the FMQL30TAI provide?

    125K programmable logic cells. The fabric also carries the BRAM and DSP resources listed above.

    What package is the FMQL30TAI in?

    FCBGA676, 27×27 mm. Check the pin-out for the transceiver and HPIO assignment before layout.

    What is the AI throughput of the FMQL30TAI?

    8 TOPS @ INT8. That is the peak figure; sustained throughput depends on the operator mix of the model being compiled.

    Which EDA toolchain supports the FMQL30TAI?

    Procise for the FM7 family, Vulture for FM9, and ICraft for FPAI. The PSoC line is supported within the same flow as the FPGA family it derives from.

    Shenzhen Gaorunxin Technology Co., Ltd

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